Semiconductor device

ABSTRACT

The semiconductor device comprises a first electrode  36 , a ferroelectric film  38  formed on the first electrode, and a second electrode  46  formed on the ferroelectric film. The first electrode or the second electrode comprises SrRuO x  films  30, 40  with Pb and/or Bi added. Pb and Bi are added to the SRO film, whereby the diffusion of the Pb and Bi contained in the ferroelectric film into the SRO film are suppressed, which leads to an improvement of capacitor ferroelectric properties. Thus, the semiconductor device can realize low-voltage operation and hydrogen deterioration resistance by using the SRO film.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims priority of JapanesePatent Application No. 2000-3837, filed, the contents being incorporatedherein by reference.

BACKGROUND OF THE INVENTION

[0002] The present invention relates to a semiconductor device and amethod for fabricating the semiconductor device, more specifically to asemiconductor device comprising the capacitors formed of ferroelectricfilm.

[0003] An FRAM (Ferro-electric Random Access Memory) is a nonvolatilesemiconductor memory using ferroelectric film as dielectrics of thecapacitors. The FRAM is much noted for the high operation speed and lowelectric power consumption.

[0004] A structure of the capacitors of such FRAM will be explained withreference to FIG. 12. FIG. 12 is a conceptual view of the capacitors ofthe conventional semiconductor device.

[0005] As shown in FIG. 12, an IrO₂ film 130 and a Pt film 134 areformed the latter on the former, and the IrO₂ film 130 and the Pt film134 form a lower electrode 136.

[0006] A ferroelectric film 138 of a PbZr_(x)Ti_(1−x)O₃ (PZT) film or aSrBi₂Ta₂O₉ (SBT) film is formed on the lower electrode 136.

[0007] An IrO₂ film 140 and a Pt film 144 are sequentially formed on theferroelectric film 138. The IrO₂ film 140 and the Pt film 144 form anupper electrode 146.

[0008] The lower electrode 136, the ferroelectric film 138 and the upperelectrode 146 form a capacitor 148.

[0009] However, in a case that, as shown in FIG. 12, the lower electrode136 and the upper electrode 146 of the capacitor 148 are formed ofIr-family films, it is difficult to realize low-voltage operation andhydrogen deterioration resistance, which are required by the nextgeneration devices.

[0010] As an electrode material which is able to realize improvedlow-voltage operation and hydrogen deterioration resistance, SRO(SrRuO_(x)) film is noted. SRO film, which has perovskite structure, ashave PZT and SBT, is not easily damaged in semiconductor devicefabrication processes, and is expected to realize low-voltage operation.SRO film is a material of high resistance to hydrogen.

[0011] However, a capacitor formed of SRO film used as an electrodematerial Pb or Bi contained in the ferroelectric film tend to diffuseinto the SRO film.

[0012] In view of this, a technique which can realize low-voltageoperation and hydrogen deterioration resistance by using SRO film.

SUMMARY OF THE INVENTION

[0013] An object of the present invention is to provide a semiconductordevice which can realize low-voltage operation and hydrogendeterioration resistance by using SRO film.

[0014] The above-described object is achieved by a semiconductor devicecomprising: a first electrode; a ferroelectric film formed on the firstelectrode; and a second electrode formed on the ferroelectric film, thefirst electrode or the second electrode comprising SrRuO_(x) film withPb and/or Bi added. Pb and Bi are added to the SRO film, whereby thediffusion of the Pb and Bi contained in the ferroelectric film into theSRO film are suppressed, which leads to an improvement of the capacitorferroelectric properties. Thus, the semiconductor device can realizelow-voltage operation and hydrogen deterioration resistance by using theSRO film.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015]FIGS. 1A and 1B are sectional views of the semiconductor deviceaccording to a first embodiment of the present invention.

[0016]FIG. 2 is a graph of X-ray diffraction patterns of SRO films.

[0017]FIGS. 3A to 3C are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which show themethod (Part 1).

[0018]FIGS. 4A and 4B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which show themethod (Part 2).

[0019]FIGS. 5A and 5B are sectional views of the semiconductor deviceaccording to the first embodiment of the present invention in the stepsof the method for fabricating the semiconductor device, which show themethod (Part 3).

[0020]FIG. 6 is sectional views of the semiconductor device according tothe first embodiment of the present invention in the steps of the methodfor fabricating the semiconductor device, which show the method (Part4).

[0021]FIGS. 7A and 7B are sectional views of modifications of thecapacitor of the semiconductor device according to the first embodiment,which show electrode structures of the modifications.

[0022]FIGS. 8A and 8B are sectional views of the semiconductor deviceaccording to a second embodiment of the present invention.

[0023]FIGS. 9A and 9B are sectional views of modifications of theelectrode structure of the capacitor of the semiconductor deviceaccording to the second embodiment of the present invention.

[0024]FIGS. 10A and 10B are sectional views of the semiconductor deviceaccording to a third embodiment of the present invention.

[0025]FIGS. 11A and 11B are sectional views of modifications of theelectrode structure of the capacitor of the semiconductor deviceaccording to the third embodiment of the present invention.

[0026]FIG. 12 is a graph showing a constitution of the capacitor of theconventional semiconductor device.

DETAILED DESCRIPTION OF THE INVENTION

[0027] A First Embodiment

[0028] The semiconductor device according to a first embodiment of thepresent invention and a method for fabricating the semiconductor devicewill be explained with reference to FIGS. 1A to 6. FIGS. 1A and 1B aresectional views of the semiconductor device according to the presentembodiment. FIG. 1B is a view of a structure of the capacitor of thesemiconductor device according to the present embodiment. FIG. 2 is agraph of X-ray diffraction patterns of SRO film. FIGS. 3A to 6 aresectional views of the semiconductor device in the steps of the methodfor fabricating the semiconductor device according to the presentembodiment.

[0029] Semiconductor Device

[0030] In the semiconductor device according to the present embodiment,the present invention is applied to a ferroelectric RAM, i.e., an FRAM.

[0031] As shown in FIGS. 1A and 1B, a device isolation film 14 fordefining a device region 12 is formed on a silicon substrate 10. In thedevice region 12 defined by the device isolation film 14 there is formeda transistor including a gate electrode 18 having a sidewall insulationfilm 16 formed on the side walls, and a source/drain diffused layer 20.

[0032] A 600 nm-thickness inter-layer insulation film 22 is formed onthe entire surface. A contact hole 23 which arrives at the source/draindiffused layer 20 is formed in the inter-layer insulation film 22.Conductor plugs 24 a, 24 b are formed in the contact hole 23.

[0033] On the inter-layer insulation film 22 there are sequentiallyformed a stopper film 26 of a 100 nm-thickness silicon oxide nitridefilm, and a 100 nm-thickness silicon oxide film 28.

[0034] On the silicon oxide film 28, a lower electrode 36 of a Pt/SROstructure of a 50 to 500 nm-thickness Pb-added SRO film (SrRuO_(x)) 30and a 5 to 200 nm-thickness Pt film 34 is formed. An additional amountof Pb for the SRO film 30 is preferably, e.g., below 10% because a toolarge additional amount of Pb for the SRO film 30 disturbs the crystalstructure of the SRO film, i.e., perovskite structure.

[0035] On the lower electrode 36, a ferroelectric film 38 of a 230nm-thickness PZT (PbZr_(x)T_(1−x)O₃) film is formed.

[0036] On the ferroelectric film 38 there is formed an upper electrode46 of a Pt/SRO structure of a 50 to 500 nm-thickness Pb-added SRO film40 and a 5 to 200 nm-thickness Pt film 44. For the same reason asdescribed above, a Pb additional amount for the SRO film 40 ispreferably, e.g., below 10%.

[0037] The lower electrode 36, the ferroelectric film 38 and the upperelectrode 46 constitute a capacitor 48 for the memory.

[0038] A 300 nm-thickness silicon oxide film 50 is further formed on theentire surface. In the silicon oxide film 50, a contact hole 52 arrivingat the upper electrode 46, and a contact hole 54 arriving at theconductor plug 24 a are formed. On the silicon oxide film 50, a localinterconnection for interconnecting the upper electrode 46 and theconductor plug 24 a through the contact holes 52, 54 are formed.

[0039] Further, an inter-layer insulation film 58 of a 300 nm-thicknesssilicon oxide film is formed on the entire surface. A contact hole 60arriving at the conductor plug 24 b is formed in the inter-layerinsulation film 58, the silicon oxide films 50, 28 and the stopper film26. A bit line 62 is connected to the conductor plug 24 b through thecontact hole 60. The semiconductor device according to the presentembodiment has such structure.

[0040] The semiconductor device according to the present embodiment ischaracterized in that the lower electrode 36 and the upper electrode 46comprise the Pb-added SRO films 30, 40. In a case that the upperelectrode and the lower electrode comprise pure SRO films, Pb containedin the ferroelectric film of PZT film tends to diffuse into the SROfilms. In the present embodiment, however, Pb is added to the SRO films,whereby the diffusion of the Pb contained in the ferroelectric film 38into the SRO film can be suppressed, which leads to an improvement ofthe capacitor ferroelectric properties. Thus, the semiconductor deviceaccording to the present embodiment can realize low-voltage operationand hydrogen deterioration resistance by using the SRO film.

[0041] Crystal Structure of the SRO Film

[0042] Then, a crystal structure of the Pb-added SRO film will beexplained with reference to FIG. 2. FIG. 2 is a graph of X-raydiffraction patterns of the SRO film. The X-ray diffraction patternsshown in FIG. 2 were given by X-ray diffraction (XRD) for applyingX-rays to a sample and recording diffraction images of scattered X-raysto analyze a crystal structure of the sample.

[0043] Example 1 shows X-ray diffraction patterns of the SRO film withPb added by 1%. Example 2 shows X-ray patterns of the SRO film with Pbadded by 3%.

[0044] As shown in FIG. 2, even with the increase and decrease of the Pbadditional amount, the X-ray diffraction patterns of the SRO film aresubstantially the same. Based on this, it is considered that theaddition of Pb to the SRO film does not especially affect the crystalstructure of the SRO film, i.e., perovskite structure.

[0045] Accordingly, the semiconductor device according to the presentembodiment can realize low-voltage operation and improved hydrogendeterioration resistance by using the SRO films.

[0046] Method for Fabricating the Semiconductor Device

[0047] The method for fabricating the semiconductor device according tothe present embodiment will be explained with reference to FIGS. 3A to6.

[0048] First, as shown in FIG. 3A, the device isolation film 14 fordefining a device region 12 is formed on the surface of a siliconsubstrate 10 by LOCOS (LOCal Oxidation of Silicon).

[0049] Next, a transistor including a gate electrode 18 with thesidewall insulation film 16 formed on the side walls, and thesource/drain diffused layer 20 is formed in the device region 12.

[0050] Next, the 600 nm-thickness inter-layer insulation film 22 isformed of silicon oxide film on the entire surface by CVD (ChemicalVapor Deposition), and then the surface of the inter-layer insulationfilm 22 is planarized by CMP (Chemical Mechanical Polishing).

[0051] Contact holes 23 are formed in the inter-layer insulation film 22by photolithography down to the source/drain diffused layer 20.

[0052] Then, the 20 nm-thickness Ti film and the 50 nm-thickness TiNfilm are sequentially formed on the entire surface by sputtering tothereby form an adhesion layer of Ti film and TiN film. Then, the 600nm-thickness tungsten layer is formed on the entire surface by CVD.

[0053] Next, the tungsten layer and the adhesion layer are polished byCMP until the surface of the inter-layer insulation film 22 is exposed.Thus, the conductor plugs 24 a, 24 b of the adhesion layer and thetungsten layer are formed in the contact holes 23 (see FIG. 3B).

[0054] Then, the stopper film 26 of a 100 nm-thickness silicon oxidenitride film and the 100 nm-thickness silicon oxide film 28 aresequentially formed on the entire surface by CVD (see FIG. 3C).

[0055] Next, the 50 to 500 nm-thickness SRO film 30 with Pb added isformed by sputtering. As a film forming condition for the SRO film 30,for example, a target of Pb-added SRO may be used. As a sputter power,either of DC and RF can be used and suitably set at, e.g., 0.3 to 3.0Wcm⁻². A flow rate ratio between Ar gas and O₂ gas can be suitably setwithin, e.g., 99:1 to 50:50. A pressure in the film forming chamber canbe suitably set within, e.g., 0.5 to 4.0 Pa. A substrate temperature canbe suitably set within, e.g., the room temperature to 700° C.

[0056] The 5 to 200 nm-thickness Pt film 34 is formed on the entiresurface in an Ar atmosphere by sputtering. Film forming conditions canbe, e.g., a target of Pt, a 0.5 to 5.0 W power, a 50 to 200 sccm Ar flowrate and a substrate temperature of the room-temperature to 500° C.

[0057] Next, the 230 nm-thickness PbZr_(x)Ti_(1−x)O₃(PZT) film is formedon the entire surface by sputtering or CSD (Chemical SolutionDecomposition). Then, thermal processing is made at 550 to 750° C. tocrystallize the PZT film into perovskite structure. Thus, thefeeroelectric film 38 of the PZT film is formed (see FIG. 4A).

[0058] Next, in the same way as the SRO film 30 is formed, the 50 to 500nm-thickness SRO film 40 is formed on the entire surface.

[0059] Then, in the same as the Pt film 34 is formed, the 5 to 200nm-thickness Pt film 44 is formed on the entire surface.

[0060] Next, thermal processing for improving capacitor characteristicsis made at 550 to 700° C. (see FIG. 4B).

[0061] Then, the Pt film 44, the SRO film 40, the ferroelectric film 38,the Pt film 34 and the SRO film 30 are patterned by photolithography.Thus, the SRO film 30 and the Pt film 34 constitute the lower electrode36 of the Pt/SRO structure, the SRO film 40 and the Pt film 44constitute the upper electrode 46 of the Pt/SRO structure, and the lowerelectrode 36, the ferroelectric film 38 and the upper electrode 46constitute the capacitor 48 (see FIG. 5A). Dry etching can be used forthe patterning, and an etching gas can be a gas containing, e.g., Cl₂,O₂ and Ar.

[0062] Then, the 300 nm-thickness silicon oxide film is formed on theentire surface.

[0063] Next, the contact hole 52 is formed in the silicon oxide film 50down to the upper electrode 46 by photolithography. The contact hole 54is formed down to the conductor plug 24 a in the silicon oxide films 50,28 and the stopper film 26.

[0064] Next, a TiN film is formed on the entire surface. Then, the TiNfilm is patterned by photolithography to form the local interconnection56 which interconnects the upper electrode 46 and the conductor plug 24a through the contact holes 52, 54 (see FIG. 5B).

[0065] Next, the inter-layer insulation film 58 of a 300 nm-thicknesssilicon oxide film is formed on the entire surface.

[0066] Then, the contact hole 60 is formed by photolithography in theinter-layer insulation film 58, the silicon oxide films 50, 28 and thestopper film 26 down to the conductor plug 24 b.

[0067] Next, a 600 nm-thickness Al film is formed on the entire surface.Then, the Al film is patterned to form the bit line 62 connected to theconductor plug 24 b through the contact hole 60 (see FIG. 6).

[0068] Thus, the semiconductor device according to the presentembodiment is fabricated.

[0069] Modifications

[0070] Then, modifications of the structure of the capacitor will beexplained with reference to FIGS. 7A and 7B. FIG. 7A is a sectional viewof the capacitor of a modification (Modification 1), which shows astructure of the capacitor. FIG. 7B is a sectional view of the capacitorof a modification (Modification 2), which shows a structure of thecapacitor. In FIGS. 7A and 7B, the constituent members other than thecapacitor are not shown.

[0071] In the capacitor shown in FIG. 7A, the lower electrode 36 a isformed of, e.g., the SRO film 30 alone of a 60 nm-thickness with Pbadded, and the upper electrode 46 a is formed of, e.g., the SRO film 40alone of a 60 nm-thickness with Pb added. The ferroelectric film 38 isformed between the lower electrode 36 a and the upper electrode 46 a.The lower electrode 36 a, the ferroelectric film 38 and the upperelectrode 46 a constitute the capacitor 48 a. In the capacitor shown inFIG. 7A, the SRO films 30, 40 with Pb added are in direct contact withthe ferroelectric film 38 of PZT film, whereby the diffusion of Pb canbe further suppressed in comparison with the diffusion in the case thatPt film or others are formed between the ferroelectric film and the SROfilm. Also in the capacitor 48 a shown in FIG. 7A, because no Pt film isused in the lower electrode 36 a and the upper electrode 46 a, even whenthe lower electrode 36 a and the upper electrode 46 a are exposed to ahydrogen atmosphere in the fabrication process, the lower electrode 36 aand the upper electrode 46 a do not easily react with the hydrogen, andaccordingly the deterioration of the capacitor 48 a can be suppressed.The SRO films 30, 40 having perovskite structure, and the ferroelectricfilm 38 having perovskite structure are in direct contact with eachother, whereby the capacitor can realize good electric characteristics.

[0072] In the capacitor shown in FIG. 7B, the lower electrode 36 b ofthe IrO₂/SRO structure is formed of the SRO film 30 of a 60 nm-thicknesswith Pb added, and a 50 nm-thickness IrO₂ film 31, and the upperelectrode 46 b of the IrO₂/SRO structure is formed of the SRO film 40 ofa 15 nm-thickness with Pb added, and a 50 nm-thickness IrO₂ film 41. Theferroelectric film 38 is formed between the lower electrode 36 b and theupper electrode 46 b. The lower electrode 36 b, the ferroelectric film38 and the upper electrode 46 b constitute the capacitor 48 b. That is,in the capacitor shown in FIG. 7B, the IrO₂/SRO structure is applied tothe lower electrode 36 b and the upper electrode 46 b. The IrO₂ film hasthe effect of suppressing the diffusion of Sr, and has good adhesion tothe SRO film. Accordingly, these modifications can realize improveproperties of the ferroelectric capacitor.

[0073] As described above, structures of the electrodes, film thickness,etc. may be suitably set in consideration of structures characteristicof the semiconductor device and aimed electric characteristics.

[0074] A Second Embodiment

[0075] The semiconductor device according to a second embodiment of thepresent invention and a method for fabricating the semiconductor devicewill be explained with reference to FIG. 8A and 8B. FIG. 8A is sectionalviews of the semiconductor device according to the present embodiment.FIG. 8B is a view of a structure of the capacitor of the semiconductordevice according to the present embodiment. The same members of thepresent embodiment as those of the semiconductor device according to thefirst embodiment and the method for fabricating the same shown in FIGS.1A to 7B are represented by the same reference numbers not to repeat orto simplify their explanation.

[0076] Semiconductor Device

[0077] As shown in FIGS. 8A and 8B, on a silicon oxide film 28 there isformed a lower electrode 64 of the Pt/SRO structure of a 50 to 500nm-thickness SRO film 30 a with Bi added and a 5 to 200 nm-thickness Ptfilm 34. A Bi additional amount for the SRO film 30 a is preferablybelow, e.g., 10% because an excessive additional amount of Bi for theSRO film 30 a disturbs the crystal structure, i.e., perovskitestructure.

[0078] On the lower electrode 64, a ferroelectric film 66 of a 230nm-thickness SBT (SrBi₂Ta₂O₉) film is formed.

[0079] On the ferroelectric film 66 there is formed an upper electrode68 of the Pt/SRO structure of a 50 to 500 nm-thickness SRO film 40 awith Bi added and a 5 to 200 nm-thickness Pt film 44. For the reasondescribed above, a Bi additional amount for the SRO film 40 a ispreferably below, e.g., 10%.

[0080] The lower electrode 64, the ferroelectric film 66 and the upperelectrode 68 constitute a capacitor 70 for the memory.

[0081] The semiconductor device according to the present embodiment ischaracterized mainly in that the ferroelectric film 66 of the capacitoris SBT film, the lower electrode 64 and the upper electrode 68 includethe SRO films 30 a, 40 a with Bi added. In a case that the lowerelectrode and the upper electrode comprise pure SRO films, the Bicontained in the ferroelectric film of SBT film diffuses into the SROfilms with a result of large leakage current. In the present embodiment,however, Bi is added to the SRO films 30 a, 40 a, whereby the diffusionof the Bi contained in the ferroelectric film 66 can be suppressed.Thus, according to the present embodiment, in which the upper electrodeand the lower electrode of the capacitor comprise SRO film, the leakagecurrent can be depressed.

[0082] Crystal Structure of SRO Film

[0083] Next, a crystal structure of the SRO film with Bi added will beexplained with reference to FIG. 2.

[0084] In FIG. 2, Example 3 shows X-ray diffraction pattern of the SROfilm with Bi added by 3%. As shown in FIG. 2, the X-ray diffractionpattern of Example 3 is substantially the same as those of the X-raydiffraction patterns of Examples 1 and 2.

[0085] Based on this it is considered that even the addition of Bi tothe SRO film remarkably affects the crystal structure of the SRO film.

[0086] Thus, the semiconductor device according to the presentembodiment can realize low-voltage operation and improved hydrogendeterioration resistance.

[0087] Method for Fabricating the Semiconductor Device

[0088] Next, the method for fabricating the semiconductor deviceaccording to the present embodiment will be explained.

[0089] The steps of the method for fabricating the semiconductor deviceup to the step of forming a silicon oxide film 28 including the siliconoxide film forming step are the same as those of the method forfabricating the semiconductor device according to the first embodimentshown in FIGS. 3A to 3C, and their explanation will not be repeated.

[0090] Then, a 10 to 200 nm-thickness SRO film 30 a with Bi added isformed by sputtering. As a condition for forming the SRO film 30 a, forexample, a target of SRO with Bi added can be used. As a sputter power,either of DC and RF may be used and can be suitably set within a rangeof, e.g., 0.3 to 3.0 Wcm⁻². A flow rate ratio between Ar gas and O₂ gascan be suitably set within a range of, e.g., 99:1 to 50:50. A pressurein the film forming chamber can be suitably set within a range of 0.5 to4.0 Pa. A substrate temperature can be suitably set within a range of,e.g., the room temperature to 700° C.

[0091] Next, in the same way as in the first embodiment, a 100 to 200nm-thickness Pt film 34 is formed.

[0092] Then, a ferroelectric film 66 is formed of SBT film, which isferroelectric film, on the entire surface by CVD. As film formingconditions, for example, a substrate temperature is 400° C., a pressurein the film forming chamber is 7 Torr, a flow rate of solution materialsis 0.1 cc/min, a solution material composition ratio is Sr:Bi:Ta=1.5:7.3:2, a total carrier gas flow rate is 1.5 slm, and a carrier gasO₂/N₂ flow rate ratio is 50%. Solution materials are Sr(DPM)₂ (strontiumbis-dipivaloylmethanate), Bi(Ph)₃ (triphenyl bismuth), andTa(OiPr)₄(DPM) (tantalium tetrakis-isopropoxy dipivaloylmethanate) whichare solved by THF (tetrahydrofuran).

[0093] Then, thermal processing is made at 700° C. to crystallize theSBT film into perovskite structure. The ferroelectric film 66 of SBTfilm is thus formed.

[0094] Then, by the same process for forming the SRO film 30 a, the 10to 200 nm-thickness SRO film 40 a with Bi added is formed on the entiresurface.

[0095] Next, in the same way as in the first embodiment, the 50 to 150nm-thickness Pt film 44 is formed on the entire surface.

[0096] Next, thermal processing is made at 550 to 700° C. for improvingcapacitor characteristics.

[0097] Then, the steps which are the same as those of the method forfabricating the semiconductor device according to the first embodimentshown in FIGS. 5A to 6 follow, and their explanation will not berepeated. The semiconductor device according to the present embodimentis thus fabricated.

[0098] Modifications

[0099] Next, modification of the electrode structure of the capacitorwill be explained with reference to FIGS. 9A and 9B. FIG. 9A is asectional view of a modification (Modification 1) of the electrodestructure of the capacitor. FIG. 9B is a sectional view of amodification (Modification 2) of the electrode structure of thecapacitor. In FIGS. 9A and 9B, the constituent members except thecapacitor are not shown.

[0100] The capacitor 70 a shown in FIG. 9A comprises, as does thecapacitor 48 a shown in FIG. 7A, the lower electrode 64 a of a layeralone of SRO film, and the upper electrode 68 a of a layer alone of SROfilm. Accordingly, the present modification can produce the same effectsas the capacitor shown in FIG. 7A.

[0101] The capacitor shown in FIG. 9B comprises the lower electrode 64 band the upper electrode 68 b of IrO₂/SRO structure as does the capacitor48 b shown in FIG. 7B. Accordingly, Modification 2 can produce the sameeffects as the capacitor shown in FIG. 7B.

[0102] As described above, an electrode structure, film thickness, etc.may be suitably set in consideration of a structure characteristic of asemiconductor device, aimed electric characteristics, etc.

[0103] A Third Embodiment

[0104] The semiconductor device according to a third embodiment of thepresent invention and a method for fabricating the semiconductor devicewill be explained with reference to FIGS. 10A and 10B. FIG. 10A issectional views of the semiconductor device according to the presentembodiment. FIG. 10B is a view of a structure of the capacitor of thesemiconductor device according to the present embodiment. The samemembers of the present embodiment as those of the semiconductor deviceaccording to the first embodiment and the method for fabricating thesame shown in FIGS. 1A to 9B are represented by the same referencenumbers not to repeat or to simplify their explanation.

[0105] Semiconductor Device

[0106] As shown in FIGS. 10A and 10B, on a silicon oxide film 28 thereis formed a lower electrode 72 of the Pt/SRO structure of a 50 to 500nm-thickness SRO film 30 b with Pb and Bi added and a 5 to 200nm-thickness Pt film 34. A Pb additional amount and a Bi additionalamount for the SRO film 30 b are, e.g., below 10%.

[0107] A ferroelectric film 74 of a 230 nm-thickness PZT or SBT film isformed on the lower electrode 72.

[0108] On the ferroelectric film 74 there is formed an upper electrodeof the Pt/SRO structure of a 50 to 500 nm-thickness SRO film 40 b withPb and Bi added and a 5 to 200 nm-thickness Pt film 44. A Pb additionalamount and a Bi additional amount for the SRO film are, e.g., below 10%.

[0109] The lower electrode 72, the ferroelectric film 74 and the upperelectrode 76 constitute a capacitor 78 of the memory.

[0110] The semiconductor device according to the present embodiment ischaracterized mainly in that the lower electrode 72 and the upperelectrode 76 of the capacitor comprise the SRO films 30 b, 40 b with Pband Bi added. The SRO films 30 b, 40 b contain Pb and Bi, whereby ineither case that the ferroelectric film 74 is formed of PZT film or SBTfilm, the diffusion of the Pb and Bi into the SRO films 30 b, 40 b canbe suppressed. That is, according to the present embodiment, theferroelectric film of the capacitor is formed of either of PZT film andSBT film, whereby the ferroelectric capacitor properties can beimproved.

[0111] Method for Fabricating the Semiconductor Device

[0112] Then, the method for fabricating the semiconductor deviceaccording to the present embodiment will be explained.

[0113] The steps of the method for fabricating the semiconductor deviceup to the step of forming a silicon oxide film 28 including the siliconoxide film forming step are the same as those of the method forfabricating the semiconductor device according to the first embodimentshown in FIGS. 3A to 3C, and their explanation will not be repeated.

[0114] Then, a 10 to 200 nm-thickness SRO film 30 b with Pb and Bi addedis formed by sputtering. As a condition for forming the SRO film 30 b,for example, a target of SRO with Pb and Bi added can be used. As asputter power, either of DC and RF may be used and can be suitably setwithin a range of, e.g., 0.3 to 3.0 Wcm⁻². A flow rate ratio between Argas and O₂ gas can be suitably set within a range of, e.g., 99:1 to50:50. A pressure in the film forming chamber can be suitably set withina range of 0.5 to 4.0 Pa. A substrate temperature can be suitably setwithin a range of, e.g., the room temperature to 700° C.

[0115] Next, in the same way as in the first embodiment, a 100 to 200nm-thickness Pt film 34 is formed.

[0116] Then, in the same way as in the first or the second embodiment,the ferroelectric film 74 of PZT film or SBT film is formed.

[0117] Next, thermal processing is made at 700° C. to crystallize theferroelectric film 74 into perovskite structure. The ferroelectric film74 of PZT film or SBT film is thus formed.

[0118] Then, by the same process for forming the SRO film 30 b, the 10to 200 nm-thickness SRO film 40 b with Pb and Bi added is formed.

[0119] Then, in the same way as in the first embodiment, the 50 to 150nm-thickness Pt film 44 is formed on the entire surface.

[0120] Next, thermal processing is made at 550 to 700° C. for improvingcharacteristics of the capacitor.

[0121] This step is followed by the same steps of the method forfabricating the semiconductor device according to the first embodimentshown in FIGS. 5A to 6, and the explanation of the steps will not berepeated. The semiconductor device according to the present embodimentis thus fabricated.

[0122] Modifications

[0123] Then, modifications of the electrode structure of the capacitorwill be explained with reference to FIGS. 11A and 11B. FIG. 11A is asectional view of a modification (Modification 1) of the electrodestructure of the capacitor. FIG. 11B is a sectional view of amodification (Modification 2) of the electrode structure of thecapacitor. In FIGS. 11A and 11B, the constituent members except thecapacitor are not shown.

[0124] The capacitor 78 a shown in FIG. 11A comprises a lower electrode72 a and an upper electrode 76 a each formed of a single layer of SROfilm alone, as does the capacitor 48 a shown in FIG. 7A. Accordingly,Modification 1 can produce the same effects as the capacitor shown inFIG. 7A.

[0125] The capacitor 78 b shown in FIG. 11B comprises a lower electrode72 b and an upper electrode 76 b of the IrO₂/SRO structure, as does thecapacitor 48 b shown in FIG. 7B. Accordingly, Modification 2 can producethe same effects as the capacitor shown in FIG. 7B.

[0126] As described above, an electrode structure, film thickness, etc.can be suitably set in consideration of a structure characteristic of asemiconductor device, aimed electric characteristics, etc.

[0127] Modified Embodiments

[0128] The present invention is not limited to the above-describedembodiment and can cover other various modifications.

[0129] For example, in the first to the third embodiments, the presentinvention is applied to FRAM. However, the present invention is notlimited to FRAM and is applicable to all the semiconductor deviceshaving capacitors which comprise ferroelectric film.

[0130] In the first to the third embodiment, both the upper electrodeand the lower electrode comprise SRO film. However, it is possible thateither of the upper and the lower electrodes comprises SRO film.

[0131] In the first to the third embodiments, the upper electrode andthe lower electrode have the Pt/SRO structure. However, the upperelectrode and the lower electrode do not have essentially the Pt/SROstructure and may have, e.g., Pt/IrO_(x)/SRO structure.

[0132] In the first to the third embodiment, the upper electrode and thelower electrode comprise Pt film. However, Pt film is not essential, andthe upper electrode and the lower electrode may comprise, e.g.,Pt-content alloy films.

[0133] In the first to the third embodiments, SRO film with Pb and Biadded is used. However, additives to be added to the SRO film may besuitably changed corresponding to materials of the ferroelectric film.

[0134] In the first to the third embodiments, the ferroelectric film isformed of PZT film or SBT film. However, it is not essential that theferroelectric film is formed of PZT film or SBT film. Any ferroelectricfilm can be used. For example, SrBi₂(Ta,Nb)₂O₉ film, (Ba,Sr)TiO₃ film,PbTiO₃ film, BiTiO₃ film, Y1-group film, etc. can be used. PbTiO₃ filmdoped with Ca, La, Nb or Sr, and other films may be used. Materials tobe added to the SRO film may be suitably selected corresponding to amaterial of the ferroelectric film.

[0135] In the first to the third embodiments, the ferroelectric film isformed of PZT film, but may be formed of PZT (PLZT) film having La dopedby, above 0.1%. The La is doped, whereby characteristics and a latticeconstant of the ferroelectrics can be suitably set.

[0136] In the first to the third embodiments, a target is sintered SRO.However, a target is not limited to sintered SRO and may be, e.g., SROformed by hot isostatic press (HIP) or SRO formed by hot press.

[0137] In the first to the third embodiments, the SRO film is formed bysputtering. However, the SRO film may be spin coated by CSD, which formsfilms by using an SRO solution.

[0138] In the first to the third embodiments, the SRO film is formed bysputtering. However, the SRO film may be formed by sputtering, CVD orPLD (Pulse Laser Deposition).

[0139] As described above, according to the present invention, Pb and Biare added to the SRO film, whereby the diffusion of the Pb and Bicontained in the ferroelectric film into the SRO film can be suppressed.Accordingly, the present invention can provide a semiconductor devicewhich can realize by using SRO film low-voltage operation and improvedhydrogen deterioration resistance.

What is claimed is:
 1. A semiconductor device comprising: a firstelectrode; a ferroelectric film formed on the first electrode; and asecond electrode formed on the ferroelectric film, the first electrodeor the second electrode comprising SrRuO_(x) film with Pb and/or Biadded.
 2. A semiconductor device according to claim 1 , wherein theSrRuO_(x) film is in contact with the ferroelectric film.
 3. Asemiconductor device according to claim 1 , wherein the ferroelectricfilm is PbZr_(x)Ti _(1−x)O₃ film or SrBi₂Ta₂O₃ film.
 4. A semiconductordevice according to claim 2 , wherein the ferroelectric film isPbZr_(x)Ti_(1−x)O₃ film or SrBi₂Ta₂O₃ film.
 5. A semiconductor deviceaccording to claim 1 , wherein an additional amount of Pb or Bi for theferroelectric film is below 10%.
 6. A semiconductor device according toclaim 2 , wherein an additional amount of Pb or Bi for the ferroelectricfilm is below 10%.
 7. A semiconductor device according to claim 3 ,wherein an additional amount of Pb or Bi for the ferroelectric film isbelow 10%.
 8. A semiconductor device according to claim 4 , wherein anadditional amount of Pb or Bi for the ferroelectric film is below 10%.